I use Bitsum´s ParkControl to activate all the cores from parking with 7800x3d. Used it with 5800x3d also so i dont know do i really need it anymore, but it is still active and my cores never parked.
Cores never get parked on a 7800x3d so no need for ParkControl.
As long as you aren’t swapping a 7800X3D in where a 7900X (or other dual-chiplet CPU) was used. You can do that and still not worry about core parking, but you have to get rid of the AMD R9 chipset driver and install the R7 version.
Clean build with a clean Windows install? The 7800X3D (as you say) won’t use core parking.
Is this actually stable though? Those timings are pretty loose.
You have a dual CCD chip, so at least you can take advantage of double the bandwidth and not be royally limited by the infinity fabric’s 64 GB/s read per CCD @ FCLK 2000. Max theoretical bandwidth for 8000 MT/s is 128 GB/s.
Yes it is very stable - not one hiccup after several weeks of stress testing & gaming. Not able to push it past 8000 mt/s but I’m not surprised as I don’t think the Ryzen 7000 series cpu’s can go any further.
I did see an interesting youtube video from Buildzoid just the other day recommending fclk to be set to 2000 when setting mt/s to 8000 as it has some synchronization benefits however I’m still on the fence with that (currently fclk = 2167).
As you mentioned the timings are fairly loose and I wouldn’t mind pushing it a little more.
Setting FCLK to 2000 will probably help lower latency, but might lower bandwidth because of the infinity fabric bottleneck.
For timings, try these. These should be pretty conservative, so can’t imagine them giving you a hard time. Run a PYPrime benchmark before and after so you can compare the results. PYPrime is very sensitive to timings.
- tCL 38 → can go to 36 if willing to bump up VDD/VDD to 1.5-1.55v
- tRCD/tRP → I’d leave at 48. You could probably get it down 46 or 47 if you really wanted
- tRAS → As low as you can go. 40 should be doable for Hynix M-Die
- tRC → tRP + tRAS is a safe rule
- tRRD_S–> 8
- tRRD_L → 12
- tFAW → 32 (should be 4*min(tRRD))
- tWR → 60 is conservative, can probably go to the register limit at 48
- tRFC → multiples of 32. A conservative tRFC for 8000 is around 768. Push it as low as it can go to lower latency, but lowering will also cause errors if temps get too high
- tRFC2/tRFCpb → Auto (as far as I remember, the Zen 4 memory controller doesn’t use these)
- tWCL → tCL-2 is safe, but Hynix M-Die can easily go into 20s
- tRTP → 12
Thx - getting late in the day so will try tomorrow.
To avoid getting off topic, let’s limit the discussion to 7950x3d Benchmarks for MSFS 2020. There is a dedicated thread about RAM so discussions around overclocking or adjusting timings should be conducted there.